1. Field of the Invention
The present invention relates to a semiconductor device which has a pnpn junction, and more particularly, it relates to a semiconductor in which a resistor region made of a semiconductor material is inserted between a main electrode and a control electrode.
2. Description of the Prior Art
A cross sectional view of a conventional TRIAC (triode AC switch) is shown in FIG. 1. A TRIAC 50 comprises a semiconductor chip 51 which has p-type semiconductor layers 13 and 15 and n-type semiconductor layers 11, 12, 14, 16 and 17. In the following description, the p-type semiconductor layers 13 and 15 are respectively called "P.sub.1 layer" and "P.sub.2 layer", and the n-type semiconductor layers 11, 12, 14, 16, and 17 are respectively called "N.sub.1 layer", "N.sub.2 layer", "N.sub.3 layer" and "N.sub.4 layer". The N.sub.1 layer 11 and N.sub.2 layer 12 are in the form of a well and are selectively formed in the P.sub.1 layer 13. Respective exposed surfaces of the N.sub.1 layer 11 and the N.sub.2 layer 12 and the top surface of the P.sub.1 layer 13 form the top surface of the semiconductor chip 51. On the top surface of the semiconductor chip 51, a first main electrode (T.sub.1 electrode) 2 and a gate electrode (G electrode) 1 are provided. The first main electrode 2 is provided to extend over the exposed surface of N.sub.1 layer 11 and an area 52 defined as a part of the top surface of the P.sub.1 layer 12 which exists on the opposite side of N.sub.2 layer with respect to the N.sub.1 layer, while the gate electrode 1 is provided to extend over the exposed surface of N.sub.2 layer and the top surface of the P.sub.1 layer.
The N.sub.3 layer 14 is provided on the bottom surface of P.sub.1 layer 13, and P.sub.2 layer 15 is provided on the bottom surface of the N.sub.3 layer. The N.sub.4 layer 16 and the N.sub.5 layer 17 are selectively formed on both side ends of the bottom part of P.sub.2 layer 15, respectively. A second main electrode (T.sub.2 electrode) 3 is provided on the semiconductor chip 51 so as to contact the respective bottom surface of the P.sub.2 layer 15, the N.sub.4 layer 16 and the N.sub.5 layer 17.
A pnpn junction structure is formed by serial contacts of the P.sub.2 layer 15, the N.sub.3 layer 14, the P.sub.1 layer 13 and the N.sub.1 layer 11. When a positive signal is given to the gate electrode 1 while a voltage is being applied across the T.sub.1 electrode 2 and the T.sub.2 electrode 3, a current I.sub.GT1 shown by a broken arrow flows from the gate electrode 1 to the T.sub.1 electrode 2 through the inside of the P.sub.1 layer 13. The current I.sub.GT1 causes a voltage drop due to a resistance in the P.sub.1 layer 13 in lateral direction (horizontal direction of FIG. 1), thereby the electric potential of a portion of the P.sub.1 layer existing directly below the N.sub.1 layer 11 is increased. Consequently, a junction surface J.sub.2 between the P.sub.1 layer 13 and the N.sub.1 layer 11 is forward biased and electrons are injected into the N.sub.3 layer 14 from the N.sub.1 layer 11 through the P.sub.1 layer 13. By the injection of these electrons, a junction surface J.sub.1 between the N.sub.3 layer 14 and the P.sub.2 layer 15 is forward biased and holes are injected from the P.sub.2 layer 15 to the N.sub.3 layer 14. As a result of this, a TRIAC current flows from the T.sub.2 electrode to the T.sub.1 electrode and the TRIAC 50 turns on. Because the structure of the TRIAC 50 shown in FIG. 1 is well-known, other operations of the conventional TRIAC 50 (such as turn off operation) would be obvious to those skilled in the art.
An example of a switching circuit including the triac 50 is shown in FIG. 2. When a switching signal is inputted between input terminals 31 and 32, a gate voltage is applied between T.sub.1 electrode 2 and gate electrode 1 through a photo coupler 4 which has a photo emitter 4a and a photo sensor 4b. When a voltage is being applied between output terminals 33 and 34, the TRIAC 50 is turned on, thereby the TRIAC current flows between output terminals 33 and 34 through the operation as described above. The switching circuit shown in FIG. 2 is suitable for controlling the TRIAC 50 while electrically insulating the input terminals 31, 32 and the output terminals 33, 34.
When an external voltage which causes a sudden level change is applied between the output terminals 33 and 34, a displacement current is generated in the photo sensor 4b, which flows into the gate electrode 1. If the placement current which flows into the gate electrode 1 is large, the TRIAC 50 is turned on undesirably by this displacement current as a gate current. The phenomenon is well-known to those skilled in the art as a "(dv/dt) turn on", wherein the symbol v expresses the voltage to be applied between main electrodes 2 and 3 and the symbol t expresses the time.
In order to prevent the (dv/dt) turn on, an external resistor 6 which is given as an individual element is connected between the gate electrode 1 and the T.sub.1 electrode 2, as shown in FIG. 3. In the switching circuit shown in FIG. 3, because a part of the displacement current generated in the photo sensor 4b is shunted to the external resistor 6, undesirable (dv/dt) turn on is prevented even if the value of (dv/dt) is increased to some extent. Consequently, (dv/dt) turn on resistance of the TRIAC increases.
However, in the technique shown in FIG. 3, the external resistor 6 must be connected to and TRIAC 50, and therefore, the size and price of the semiconductor device in which the switching circuit of FIG. 3 is incorporated would increase.
Another example of the conventional thyristor is shown in FIG. 4. In the TRIAC 60 shown in FIG. 4, the T.sub.1 electrode 2 is divided into two parts. In the P.sub.2 layer, only the N.sub.4 layer 16 of well-shape is formed selectively. The TRIAC 60 has a structure which is different from that of the TRIAC 50 of FIG. 1 but it is the same as the case of the TRIAC 50 in that the (dv/dt) turn on resistance is low. Consequently, the TRIAC 60 must also be connected to the external resistor 6 and used as the switching circuit shown in FIG. 3.